Tytuł: Application of the neural networks for predicting the corrections for the national timescale UTC(PL), Lecture Notes in Electrical Engineering and Electronics

Autor: Łukasz Soboleski

Wydawnictwo: Uniwersytet Zielonogórski, 2016

Streszczenie:

Otrzymane wyniki badań nad prognozowaniem poprawek dla UTC(PL) pokazały, że opracowana przez autora procedura może zastąpić dotychczas stosowaną w GUM procedurę bazującą na analitycznej metodzie regresji liniowej. Procedura może być zastosowana do prognozowania poprawek dla innych krajowych skal czasu UTC(k) bazujących na komercyjnych zegarach atomowych. Osiągnięta w wyniku przeprowadzonych badań bardzo dobra jakość prognozowania UTC(PL), zaowocowała podjęciem prac przez GUM nad wdrożeniem sieci neuronowych typu GMDH i opracowanej procedury do prognozowania poprawek dla Polskiej Skali Czasu UTC(PL).

Tytuł: Logic Synthesis for FPGA-based Finite State Machines. - Studies in Systems, Decision and Control, 38

Autor: Barkalov A., Titarenko L.,Kolopienczyk M., Mielcarek K., Bazydlo G.

Wydawnictwo: New York: Springer, 2016

Streszczenie:

Tremendous achievements in the area of semiconductor electronics result in development of very complex integrated circuits, particularly in the area of field programmable logic devices. Our book targets field-programmable gate arrays (FPGA). Up-to-day FPGAs have up to 7 billion of transistors. So, they are so huge, that it is enough only one chip to implement a rather complex digital system including a data-path and a control unit. Because of the extreme complexity of FPGA chips, it is very important to develop effective design methods targeting their particular properties. It means that the design methods should be technology-depended. The majority of digital systems include control units coordinating interplay of other system blocks. As a rule, a control unit has an irregular structure. It makes process of their design very sophisticated. In this book, we discuss the case when a control unit is represented by the model of finite state machine (FSM). The book contains a lot of original synthesis and optimization methods based on the taking into account the peculiarities of FPGA chips and an FSM model in use. One of the peculiarities of FPGA chips is existence of embedded memory blocks (EMB). We try to implement with EMBs as much of a control unit’s circuits as it is possible. It results in reducing the irregular part of the control units described by means of Boolean functions. It permits decreasing for the total number of look-up table (LUT) elements in comparison with logic circuits based on known models of FSM. Also, it decreases the number of interconnections in the resulting circuits. In turn, it makes the problem of place-and-routing much simpler. The third benefit is the reducing power dissipation in comparison with FSM circuits implemented only with LUTs. In our book, control algorithms are represented by graph-schemes of algorithms. This choice is based on obvious fact that this specification provides the simple explanation of the methods proposed by the authors.
The book is interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of modern digital systems. The proposed FSM models enlarge the class of models applied for implementation of control units with modern FPGA chips.

Tytuł: Logic Synthesis for Finite State Machines Based on Linear Chains of States: Foundations, Recent Developments and Challenges.- Studies in Systems, Decision and Control. V.113

Autor: 6. Barkalov A., Titarenko L., Bieganowski J.

Wydawnictwo: Berlin: Springer, 2018

Streszczenie:

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. Three groups of methods are used for hardware reduction: structural decomposition, proper state assignment and heterogeneous implementation.
We discuss optimization methods aimed at three types of VLSI chips: ASIC, CPLD and FPGA. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.
This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips.

Tytuł: Synthesis and Optimization of FPGA-based Systems (in Chinese)

Autor: Sklyarov V., Skliarova I., Barkalov A., Titarenko L.

Wydawnictwo: Pekin: China Machine Press, 2018

Streszczenie:

The book pursues two main objectives and is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs)with the main objective of extending topics that are traditionally included within digital systems in a way that enables various design techniques to be discussed, illustrated by examples, and supported by experiments with relatively cheap prototyping boards that are widely available. It begins with easily understandable introductory sections, continues with commonly used digital circuits and gradually extends to more advanced topics covering the novel techniques where parallelism is applied extensively involving not only core reconfigurable logical elements but also a number of embedded blocks (e.g. memories and digital signal processing slices) and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications in hardware-description language (VHDL, in particular) are provided that are ready to be tested and incorporated in engineering designs.A number of practical applications are discussed from areas such as data processing and vector-based computations (e.g. Hamming weight counters/comparators).The second part of the book covers more theoretical aspects of finite state machines with the main objective of reducing FPGA basic resources, minimizing the delays and achieving greater optimization of circuits and systems.
The book is translated by Springer and published in China.

Tytuł: Foundations of Embedded Systems. - Studies in Systems, Decision and Control, V. 195

Autor: Barkalov A., Titarenko L., Mazurkiewicz M.

Wydawnictwo: Cham (Switzerland): Springer, 2019

Streszczenie:

The book is devoted to embedded systems (ES) which now could be found in practically all fields of human activity. The embedded systems are the special class of computing systems monitoring and controlling the objects of the physical world. The book starts from discussing the distinctive features of ES. The main feature is the cybernetic-physical character of ES. The account of these features allows designing ES with required performance and minimum possible hardware amount. Different design methodologies are discussed. Considerable attention is paid to hardware implementation of computational algorithms. It is shown that different parts of complex ES could be implemented using the models of finite state machines (FSM). Also, the field-programmable gate arrays (FPGA) are very often used to implement different hardware accelerators in ES. The book pays considerable attention to design methods of FPGA-based FSMs. The last part of the book is devoted to programmable logic controllers widely used in industry. This book will be interesting and useful for students and postgraduates in the area of Computer Science, as well as for designers of embedded systems. It could be viewed as a good start point for creating embedded systems for different areas of human activity.

Tytuł: Logic synthesis for FPGA-based control units: Structural decomposition in logic design. - Lecture Notes in Electrical Engineering, V. 636

Autor: Barkalov A., Titarenko L., Mielcarek K., Chmielewski S.

Wydawnictwo: Cham (Switzerland): Springer, 2020

Streszczenie:

Control units are very important parts of modern digital systems. They are responsible for the efficiency of a controlled system. Very often, the model of a finite state machine (FSM) is used to represent the behaviour of a control unit. As a rule, control units have irregular structures which makes impossible to design their logic circuits using the standard library cells. Design methods depend strongly on such factors as an FSM model in use, specific features of logic elements implementing an FSM logic circuit, characteristics of a control algorithm to be interpreted. This book deals with Moore and Mealy FSMs implemented with FPGA chips including look-up table elements (LUT) and embedded memory blocks (EMB). It is very important to minimize the number of LUTs and EMBs in an FSM logic circuit, as well as make the interconnections between the logic elements more regular. Different methods of structural decomposition can be used to solve this problem. These methods are reduced to presentation an FSM circuit as a composition of different logic blocks. A majority of these blocks implement systems of intermediate logic functions different (and much simpler) from input memory functions and FSM output functions. The structural decomposition results in multilevel FSM circuits having fewer logic elements than equivalent single-level circuits. In this book we discuss well-known and propose new methods of structural decomposition. Also, we consider their impact on the final hardware amount in an FSM circuit. This book will be interesting and useful for students and postgraduates in the area of Computer Science, as well as for experts designing digital systems with complex control units. Proposed models and design methods open new possibilities for creating logic circuits of control units with optimal hardware amount and regular interconnections.